Philips Semiconductors
Product specification
Thyristor logic level
GENERAL DESCRIPTION
Glass passivated, sensitive gate thyristor in a plastic envelope, suitable for
surface mounting, intended for use in general purpose switching and phase
control applications. This device is intended to be interfaced directly to
microcontrollers, logic integrated circuits and other low power gate trigger
circuits.
BT169W Series
QUICK REFERENCE DATA
SYMBOL VDRM, VRRM IT(AV) IT(RMS) ITSM PARAMETER BT169 Repetitive peak off-state
voltages Average on-state current RMS on-state current Non-repetitive peak
on-state current MAX. MAX. MAX. MAX. UNIT BW 200 0.5 0.8 8 DW 400 0.5 0.8 8 EW
500 0.5 0.8 8 GW 600 0.5 0.8 8 V A A A
PINNING - SOT223
PIN 1 2 3 tab DESCRIPTION cathode anode gate anode
PIN CONFIGURATION
4
SYMBOL
a
k
1
2
3
g
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. half sine wave; Tsp ≤ 112 ËšC all
conduction angles half sine wave; Tj = 25 ËšC prior to surge t = 10 ms t = 8.3
ms t = 10 ms ITM = 2 A; IG = 10 mA; dIG/dt = 100 mA/µs -40 B 2001 MAX. D 4001 E
5001 G 6001 UNIT V A A A A A2s A/µs A V V W W ËšC ËšC
VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITSM Average
on-state current RMS on-state current Non-repetitivepeak on-state current
0.63 1 8 9 0.32 50 1 5 5 2 0.1 150 125
I2t dIT/dt IGM VGM VRGM PGM PG(AV) Tstg Tj
I2t for fusing Repetitive rate of rise of on-state current after triggering
Peak gate current Peak gate voltage Peak reverse gate voltage Peak gate power
Average gate power over any 20 ms period Storage temperature Operating junction
temperature
1 Although not recommended, off-state voltages up to 800V may be applied
without damage, but the thyristor may switch to the on-state. The rate of rise
of current should not exceed 15 A/µs. September 1997 1 Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
THERMAL RESISTANCES
SYMBOL Rth j-sp Rth j-a PARAMETER Thermal resistance junction to solder point
Thermal resistance junction to ambient CONDITIONS MIN. pcb mounted, minimum
footprint pcb mounted; pad area as in fig -
BT169W Series
TYP. 156 70
MAX. 15 -
UNIT K/W K/W K/W
STATIC CHARACTERISTICS
Tj = 25 ËšC unless otherwise stated SYMBOL IGT IL IH VT VGT ID, IR PARAMETER
Gate trigger current Latching current Holding current On-state voltage Gate
trigger voltage Off-state leakage current CONDITIONS VD = 12 V; IT = 10 mA;
gate open circuit VD = 12 V; IGT = 0.5 mA; RGK = 1 kΩ VD = 12 V; IGT = 0.5
mA; RGK = 1 kΩ IT = 2 A VD = 12 V; IT = 10 mA; gate open circuit VD = VDRM(max);
IT = 10mA; Tj = 125 ËšC; gate open circuit VD = VDRM(max); VR = VRRM(max); Tj =
125 ËšC; RGK = 1 kΩ MIN. 0.2 TYP. 50 2 2 1.35 0.5 0.3 0.05 MAX. 200 6 5
1.5 0.8 0.1 UNIT µA mA mA V V V mA
DYNAMIC CHARACTERISTICS
Tj = 25 ËšC unless otherwise stated SYMBOL dVD/dt tgt tq PARAMETER Critical
rate of rise of off-state voltage Gate controlled turn-on time Circuit
commutated turn-off time CONDITIONS VDM =67% VDRM(max); Tj = 125 ËšC;
exponential waveform; RGK = 1k Ω ITM = 2 A; VD = VDRM(max); IG = 10 mA;
dIG/dt = 0.1 A/µs VD = 67% VDRM(max); Tj = 125 ËšC; ITM = 1.6 A; VR = 35 V;
dITM/dt = 30 A/µs; dVD/dt = 2 V/µs; RGK = 1 kΩ MIN. TYP. 25 2 100 MAX.
UNIT V/µs µs µs
September 1997
2
Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
BT169W Series
1
Ptot / W
conduction form angle factor degrees a 30 4 60 2.8 90 2.2 120 1.9 180 1.57
BT169W
Tsp(max) / C a = 1.57 1.9 2.2
110
10
ITSM / A
BT169 IT I TSM
0.8
113
8
2.8 4 116
6
time T Tj initial = 25 C max
0.6
0.4
119
4
0.2
122
2
0
0
0.1
0.2
0.3 0.4 IF(AV) / A
0.5
0.6
125 0.7
0
1
10 100 Number of half cycles at 50Hz
1000
Fig.1. Maximum on-state dissipation, Ptot, versus average on-state current, IT(AV), where a = form factor = IT(RMS)/ IT(AV).
ITSM / A BT169
Fig.4.Maximum permissible non-repetitive peak on-state current ITSM, versus
number of cycles, for sinusoidal currents, f = 50 Hz.
1000
2
IT(RMS) / A
BT134W
1.5
100
1
10
IT T
I TSM time
0.5
Tj initial = 25 C max 1 10us 100us T/s 1ms 10ms
0 0.01 0.1 1 10
surge duration / s
Fig.2. Maximum permissible non-repetitive peak on-state
current ITSM, versus pulse width tp, for sinusoidal currents, tp ≤ 10ms.
BT134W
Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f =
50 Hz; Tsp ≤ 112ËšC.
VGT(Tj) VGT(25 C)
1.2 1 0.8 0.6 0.4 0.2
IT(RMS) / A
1.6
112 C
BT151
1.4 1.2 1 0.8 0.6
0 50 Tsp / C 100 150
0 -50
0.4 -50
0
50 Tj / C
100
150
Fig.3. Maximum permissible rms current IT(RMS) ,
versus solder point temperature Tsp.
Fig.6. Normalised gate trigger voltage VGT(Tj)/
VGT(25ËšC), versus junction temperature Tj.
September 1997
3
Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
BT169W Series
3 2.5 2 1.5
IGT(Tj) IGT(25 C)
BT169
5
IT / A Tj = 125 C Tj = 25 C
BT169W
4
Vo = 1.0 V Rs = 0.27 Ohms
3 typ max
2
1
1
0.5 0 -50
0 0 0.5 1 VT / V 1.5 2 2.5
0
50 Tj / C
100
150
Fig.7. Normalised gate trigger current IGT(Tj)/
IGT(25ËšC),versus junction temperature Tj.
IL(Tj) IL(25 C)
Fig.10. Typical and maximum on-state characteristic.
3 2.5 2 1.5 1 0.5
BT169
100
Zth j-sp (K/W
BT169W
10
1
P D tp
0.1
t
0 -50
0
50 Tj / C
100
150
0.01 10us
0.1ms
1ms
10ms tp / s
0.1s
1s
10s
Fig.8. Normalised latching current IL(Tj)/ IL(25ËšC),
versus junction temperature Tj, RGK = 1 kΩ.
IH(Tj) IH(25 C)
Fig.11. Transient thermal impedance Zth j-sp, versus pulse width tp
dVD/dt (V/us)
3 2.5
BT169
1000
100
2 1.5 1 0.5 0 -50
1 10
RGK = 1 kohms
0
50 Tj / C
100
150
0
50 Tj / C
100
150
Fig.9. Normalised holding current IH(Tj)/ IH(25ËšC),
versus junction temperature Tj, RGK = 1 kΩ.
Fig.12. Typical, critical rate of rise of off-state voltage, dVD/dt versus
junction temperature Tj.
September 1997
4
Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
MOUNTING INSTRUCTIONS
BT169W Series
Dimensions in mm.
3.8 min
1.5 min
2.3 1.5 min (3x)
6.3
1.5 min
4.6
Fig.13. soldering pattern for surface mounting SOT223.
PRINTED CIRCUIT BOARD
Dimensions in mm
36
18
60 9 4.6 4.5
10
7 15 50
Fig.14. PCB for thermal resistance and power rating for
SOT223. PCB: FR4 epoxy glass (1.6 mm thick), copper laminate (35
µmthick).
September 1997
5
Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
MECHANICAL DATA
Dimensions in mm Net Mass: 0.11 g
0.32 0.24 6.7 6.3 3.1 2.9 B
BT169W Series
0.2
M
A
4
A
0.10 0.02
3.7 3.3 13
7.3 6.7
16 max
1
10 max 1.8 max 1.05 0.85 4.6 2.3
2
0.80 0.60
3
0.1 M (4x) B
Fig.15. SOT223 surface mounting package.
Notes 1. For further information, refer to Philips
publication SC18 ' SMD Footprint Design and
Soldering Guidelines'. Order code: 9397 750 00505. 2. Epoxy meets UL94 V0
at 1/8'.
September 1997
6
Rev 1.200
Philips Semiconductors
Product specification
Thyristor logic level
DEFINITIONS
Data sheet status Objective specification Product specification Limiting values
BT169W Series
This data sheet contains target or goal specifications for product development.
This data sheet contains final product specifications.
Preliminary specification This data sheet contains
preliminary data; supplementary data may be published later.
Limiting values are given in accordance with the Absolute Maximum Rating System
(IEC 134). Stress above one or more of the limiting values may cause permanent
damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given
inthe Characteristics sections of this specification is not implied.
Exposure to limiting values for extended periods may affect device reliability.
Application information Where application information is given, it is advisory
and does not form part of the specification. © Philips Electronics N.V. 1997
All rights are reserved. Reproduction in whole or in part is prohibited without
the prior written consent of the copyright owner. The information presented in
this document does not form part of any quotation or contract,
it is believed to be accurate and reliable and may be changed without notice.
No liability will be accepted by the publisher for any consequence of its use.
Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or
systems where malfunction of these products can be reasonably expected to
result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully
indemnify Philips for any damages resulting from such improper use or sale.
September 1997
7
Rev 1.200
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